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Application notes for QUIC_8051

The ZIP files that can be downloaded contain a design directory with all files necessary to rebuilt the FPGA as well as the documentation for the design in PDF file format.

Common application notes

Name Description
Common 001 Verilog source level simulation for a QUIC_8051 based FPGA design.

Application notes for Altera FPGA

Name Description
Altera 001 Example Design based on the Altera NIOS Board (APEX 20k) and the Hitex in-circuit emulator AX51.
Altera 002 Demonstrates the implementation of on-chip XRAM in an FPGA. Bases on application note Altera 001.
Altera 003 Basically the same as application note Altera 002 but with an interface for the Hitex in-ciruit emulator DProbeHS.
Altera 004 8051 derivative with seven 8-bit ports, 4 KBytes of on-chip XRAM, and an interface for the Hitex in-circuit emulator DProbeHS. Uses 144-pin Cyclone FPGA EP1C3.

Application notes for Xilinx FPGA

Name Description
Xilinx 001 Example design with separated inputs for secondary functions and an interface for the Hitex in-circuit emulator DProbeHS. Targets Xilinx Spartan 3 FPGA XC3S200.

For other information go back to the root of the download area.